Integrated circuits which utilize IGFETs are generally evaluated on the basis of frequency response and the degree of economical utilization of semiconductor surface area.
Both frequency performance and surface area requirements are determined by the method of manufacture of the circuitry in the semiconductor. The manufacturing methods in current use include successive masking steps each being followed by a photoshaping operation. Many of these methods require that the successive masks be accurately aligned to obtain minimum surface area. The alignment of successive masks is difficult to control and usually an additional amount of semiconductor surface area is allotted in recognition of attainable tolerances in mask alignment. Cost and semiconductor surface area savings may be obtained by those methods which reduce or eliminate critical mask alignments i.e., include self-alignment features in the formation of source/drain, interconnect, gate, and conductor areas of the circuitry. Additionally, the resulting reduction in circuit size realized through self-aligning features improves the frequency response of the circuitry.